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FIFO.先进先出调度算法（FIFO）处理缺页中断
- 关于操作系统:先进先出调度算法（FIFO）处理缺页中断,On the operating system: FIFO scheduling algorithms (FIFO) handling page fault
fifo.rar
- 异步fifo的经典讲解，包括亚稳态的产生，同步电路的构造，fifo电路的结构，源代码实现。,Asynchronous fifo on the classic, including the emergence of metastable, the structure of synchronous circuits, fifo circuit structure, the source code to achieve.
cy7c68013工作在SLAVE FIFO下的FPGA源代码
- cy7c68013工作在SLAVE FIFO下的FPGA源代码，已经通过，Verilog编写,cy7c68013 slave fifo mode code ,written by hard ware language
FIFO
- verilog编写的读写fifo的源码，包括sram的读写控制-verilog source code written to read and write fifo, including the sram to read and write control
RC_A7105Reference-code
- A7105 2.4G 160通道无线方案。 这文件系统对RF chip -A7105 FIFO mode做的应用范例程式源码，供使者能够了快速使用这款RF chip。包括跳频技术等，都有详细讲解。-This document describes development of simple example procedures by A7105 FIFO mode. It could support user how to implement two-way radio and how t
fifo
- 同步fifo的原代码,给出了经典的同步fifo原代码，希望对大家有所帮助-synchronous fifo code
FIFO
- 用verilog实现异步FIFO，代码中有两个模块，使用时注意顶层模块和底层模块，用quartus2即可打开直接使用。-Verilog using Asynchronous FIFO, the code has two modules, when the attention of top-level module and the bottom module, with direct access to open quartus2.
lcd-code
- 比较完整的LCD接口代码，verilog编写，分为6800和8080两种CPU接口，且有完整的仿真程序-Relatively complete LCD interface code, verilog prepared 6800 and 8080 is divided into two types of CPU interfaces, and there is a complete simulation program
fifo的vhdl原代码
- 本文为verilog的源代码-In this paper, the source code for Verilog
FIFO
- 通用异步FIFO设计的verilog代码，来自于opencore-Universal Asynchronous FIFO Verilog design code, from opencore
Fifo
- 一个FIFO源代码，基于Altera FPGA-A FIFO source code, based on Altera FPGA
fifo
- fifo example vhdl code
FIFO
- it is a verilog code written for FIFO in modelsim simulator and it will synthesize in xinlix ise 8.2i.i have tested it om my kit.[i mae my own kit for spartan2 device].you can use this code in any DSP project in which data entry is required.-it is a
fifo-interface
- fifo(1-6:1):using ip-code and rd wd interface-fifo:using ip-code and rd wd interface
fifo
- 用VHDL语言写的FIFO代码，可设FIFO的深度-VHDL language with code written in FIFO, FIFO depth can be set up
fifo
- linux下进程间通信方式之一的fifo读写源程序。-One of the IPC under linux, including fifo read and write source code.
FIFO
- This code is a FIFO memory vhdl developed in ISE Software
fifo
- fifo 的vhdl源程序,容量为1024*8的fifo程序代码-fifo the vhdl source code,Capacity of 1024* the fifo code 8
fifo.vhd
- This a FIFO in VHDL Code-This is a FIFO in VHDL Code
FIFO
- FIFO code in verilog